A novel instruction stream buffer for VLIW architectures

DOI10.1016/J.COMPELECENG.2009.08.006zbMath1191.68121OpenAlexW1967745502MaRDI QIDQ962617

Kai-Ming Yang, Jih-Ching Chiu

Publication date: 7 April 2010

Published in: Computers and Electrical Engineering (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.compeleceng.2009.08.006

zbMATH Keywords

instruction fetcherinstruction issueinstruction stream bufferVLIW architecture

Mathematics Subject Classification ID

Computer system organization (68M99)

Uses Software

• MiBench

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