Novel design of multiplier-less FFT processors

DOI10.1016/J.SIGPRO.2006.12.004zbMath1186.94404OpenAlexW2063879057MaRDI QIDQ970835

Simon J. Shepherd, James M. Noras, Yuan Zhou

Publication date: 19 May 2010

Published in: Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.sigpro.2006.12.004

zbMATH Keywords

FFTsystolic arrayCSDmultiplier-less architecturephase-amplitude splitting

Mathematics Subject Classification ID

Signal theory (characterization, reconstruction, filtering, etc.) (94A12)

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