Mathematical methods for physical layout of printed circuit boards: an overview
From MaRDI portal
Publication:991814
DOI10.1007/s00291-007-0080-9zbMath1193.90225OpenAlexW2101080472MaRDI QIDQ991814
Thorsten Koch, Martin Grötschel, Nadine Abboud
Publication date: 8 September 2010
Published in: OR Spectrum (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s00291-007-0080-9
Applications of mathematical programming (90C90) Combinatorial optimization (90C27) Research exposition (monographs, survey articles) pertaining to operations research and mathematical programming (90-02)
Uses Software
Cites Work
- Unnamed Item
- Unnamed Item
- Unnamed Item
- Unnamed Item
- Path-distance heuristic for the Steiner problem in undirected networks
- Quadratic \(0/1\) optimization and a decomposition approach for the placement of electronic circuits
- Comparison of formulations and a heuristic for packing Steiner trees in a graph
- The Steiner tree packing problem in VLSI design
- Rectilinear group Steiner trees and applications in VLSI design
- Greedy splitting algorithms for approximating multiway partition problems
- On Steiner trees and minimum spanning trees in hypergraphs
- Packing Steiner trees: Further facets
- Packing Steiner trees: A cutting plane algorithm and computational results
- A fast hypergraph min-cut algorithm for circuit partitioning
- Worst-case ratios of networks in the rectilinear plane
- The pilot method: A strategy for heuristic repetition with application to the Steiner problem in graphs
- A Hybrid GRASP with Perturbations for the Steiner Problem in Graphs
- Recent directions in netlist partitioning: a survey
- Via Minimization with Pin Preassignments and Layer Preference
- A dual ascent approach for steiner tree problems on a directed graph
- A hybrid evolutionary analogue module placement algorithm for integrated circuit layout designs
- On finding steiner vertices
- Solving the Steiner Tree Problem on a Graph Using Branch and Cut
- An Efficient Heuristic Procedure for Partitioning Graphs
- A forced directed component placement procedure for printed circuit boards
- Parallel Multilevel series k-Way Partitioning Scheme for Irregular Graphs
- Solving Steiner tree problems in graphs to optimality
- A graph-theoretic via minimization algorithm for two-layer printed circuit boards
- A branch-and-price algorithm for switch-box routing
- Heuristics, Experimental Subjects, and Treatment Evaluation in Bigraph Crossing Minimization
- An r-Dimensional Quadratic Placement Algorithm
- A Review of the Placement and Quadratic Assignment Problems
- Improved algorithms for the Steiner problem in networks
