Supremica
From MaRDI portal
Software:30383
No author found.
Related Items (24)
Supervisory controller synthesis and implementation for safety PLCs ⋮ What information really matters in supervisor reduction? ⋮ Networked supervisor synthesis against lossy channels with bounded network delays as non-networked synthesis ⋮ Consistent reduction in discrete-event systems ⋮ Conflict-preserving abstraction of discrete event systems using annotated automata ⋮ Synthesis of covert actuator and sensor attackers ⋮ Time-optimal control of large-scale systems of systems using compositional optimization ⋮ SCT-based priority-free conditionally-preemptive scheduling of modular real-time systems with exact task execution time ⋮ Supervisory control of discrete event systems with distinguishers ⋮ Synthesis of least restrictive controllable supervisors for extended finite-state machines with variable abstraction ⋮ On the computation of counterexamples in compositional nonblocking verification ⋮ Modeling for supervisor synthesis -- a lock-bridge combination case study ⋮ A Framework for Compositional Synthesis of Modular Nonblocking Supervisors ⋮ Compositional synthesis of supervisors in the form of state machines and state maps ⋮ Time-optimal coordination of flexible manufacturing systems using deterministic finite automata and mixed integer linear programming ⋮ Compositional coordinator synthesis of extended finite automata ⋮ Optimal modular control of discrete event systems with distinguishers and approximations ⋮ Diagnosability verification using LTL model checking ⋮ Observation-assisted heuristic synthesis of covert attackers against unknown supervisors ⋮ A verification-driven framework for iterative design of controllers ⋮ On-the-fly informed search of non-blocking directed controllers ⋮ Hierarchical modelling of manufacturing systems using discrete event systems and the conflict preorder ⋮ Employing behavioral preorders to define controllability for nondeterministic discrete-event systems ⋮ A framework for compositional nonblocking verification of extended finite-state machines
This page was built for software: Supremica
