On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP
type: Item
instance of: scholarly article
title: On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP
zbMATH Open document ID: 1160.68465
author: Hubert Garavel
author: Gwen Salaün
author: Wendelin Serwe
published in: Science of Computer Programming
publication date: 2009-02-19T00:00:00Z
full work available at URL: Garavel-Salaun-Serwe-09.pdf
Mathematics Subject Classification ID: 68Q85
Mathematics Subject Classification ID: 68M99
zbMATH DE Number: 5509474
zbMATH Keywords: asynchronous circuit
zbMATH Keywords: asynchronous logic
zbMATH Keywords: asynchrony
zbMATH Keywords: chp
zbMATH Keywords: formal method
zbMATH Keywords: gals architecture
zbMATH Keywords: handshake protocol
zbMATH Keywords: hardware architecture
zbMATH Keywords: hardware design
zbMATH Keywords: lotos
zbMATH Keywords: modelling
zbMATH Keywords: network on chip
zbMATH Keywords: process calculus
zbMATH Keywords: specification
zbMATH Keywords: structured operational semantics
zbMATH Keywords: translation
zbMATH Keywords: validation
zbMATH Keywords: verification
describes a project that uses: LOTOS
describes a project that uses: BISIMULATOR
describes a project that uses: M-TREE
describes a project that uses: CADP
describes a project that uses: CAESAR
MaRDI profile type: Publication
OpenAlex ID: W2075272319
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DOI: 10.1016/J.SCICO.2008.09.011
description: scientific article; zbMATH DE number 5509474