A nonlinear optimization methodology for VLSI fixed-outline floorplanning
type: Item
instance of: scholarly article
title: A nonlinear optimization methodology for VLSI fixed-outline floorplanning
zbMATH Open document ID: 1163.90715
author: Chaomin Luo
author: Miguel F. Anjos
author: Anthony Vannelli
published in: Journal of Combinatorial Optimization
publication date: 2009-05-04T00:00:00Z
Mathematics Subject Classification ID: 90C27
Mathematics Subject Classification ID: 90C25
zbMATH DE Number: 5550479
zbMATH Keywords: circuit layout design
zbMATH Keywords: VLSI floorplanning
zbMATH Keywords: facility layout
zbMATH Keywords: combinatorial optimization
zbMATH Keywords: global optimization
zbMATH Keywords: convex programming
describes a project that uses: PATOMA
describes a project that uses: AMPL
describes a project that uses: NEOS
describes a project that uses: MINOS
MaRDI profile type: Publication
full work available at URL: s10878-008-9148-y
OpenAlex ID: W1978440339
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cites work: Semidefinite Programming
cites work: Floorplans, planar graphs, and layouts
cites work: Floorplan design of VLSI circuits
DOI: 10.1007/S10878-008-9148-Y
description: scientific article; zbMATH DE number 5550479