Layouts with wires of balanced length
type: Item
instance of: scholarly article
title: Layouts with wires of balanced length
zbMATH Open document ID: 0622.94033
DOI: 10.1016/0890-5401(87)90039-3
author: Bernd Becker
author: H. G. Osthof
published in: Information and Computation
publication date: 1987-01-01T00:00:00Z
review text: The authors investigate the optimal balanced layouts of the graphs with fixed boundaries in the Euclidean plane. It appears that the main justification for using ''the graph with fixed boundary'' is to model the abstract structure of a circuit together with topological constraints given by the boundary of the chip and fixed i/o-ports. The originality of the present paper lies in the rigorously established existence of a layout which minimizes the maximum distance of any node to its neighbors.
Mathematics Subject Classification ID: 94C15
Mathematics Subject Classification ID: 68R10
zbMATH DE Number: 4010405
zbMATH Keywords: VLSI
zbMATH Keywords: circuits
zbMATH Keywords: geometrical algorithms
zbMATH Keywords: optimal balanced layouts
zbMATH Keywords: graphs with fixed boundaries
MaRDI profile type: Publication
full work available at URL: 0890-5401(87)90039-3
OpenAlex ID: W1982599920
cites work: On the Optimal Layout of Planar Graphs with Fixed Boundary
cites work: P-Complete Approximation Problems
cites work: Algebraic multigrid (AMG): Experiences and comparisons
description: scientific article; zbMATH DE number 4010405