Functional test generation using binary decision diagrams
type: Item
instance of: scholarly article
title: Functional test generation using binary decision diagrams
zbMATH Open document ID: 0641.94035
DOI: 10.1016/0898-1221(87)90072-1
author: H. K. Reghbati
author: Magdy S. Abadir
publication date: 1987-01-01T00:00:00Z
Mathematics Subject Classification ID: 94C10
zbMATH DE Number: 4045657
zbMATH Keywords: fault detection
zbMATH Keywords: extension to the D-algorithm
zbMATH Keywords: integrated circuits
zbMATH Keywords: binary decision diagrams
zbMATH Keywords: LSI/VLSI circuit
zbMATH Keywords: network of interconnected modules
MaRDI profile type: Publication
full work available at URL: 0898-1221(87)90072-1
OpenAlex ID: W1980014718
cites work: Q3773355
cites work: Binary Decision Diagrams
cites work: A Module-Level Testing Approach for Combinational Networks
cites work: Q4159312
cites work: Functional Level Primitives in Test Generation
cites work: LSI logic testing — An overview
cites work: Test Generation for Microprocessors
published in: Computers & Mathematics with Applications
description: scientific article; zbMATH DE number 4045657