Cryptographic hardware and embedded systems - CHES 2000. 2nd international workshop, Worcester, MA, USA, August 17--18, 2000. Proceedings
type: Item
instance of: scholarly article
title: Cryptographic hardware and embedded systems - CHES 2000. 2nd international workshop, Worcester, MA, USA, August 17--18, 2000. Proceedings
zbMATH Open document ID: 0953.00047
DOI: 10.1007/3-540-44499-8
published in: Lecture Notes in Computer Science
publication date: 2001-01-10T00:00:00Z
review text: The articles of mathematical interest will be reviewed individually. The preceding workshop (1st, 1999) has been reviewed (see Zbl 0929.00092). Indexed articles: \textit{Hankerson, Darrel; Hernandez, Julio López; Menezes, Alfred}, Software implementation of elliptic curve cryptography over binary fields, 1-24 [Zbl 0998.94534] \textit{Okada, Souichi; Torii, Naoya; Itoh, Kouichi; Takenaka, Masahiko}, Implementation of elliptic curve cryptographic coprocessor over \(\text{GF}(2^m)\) on a FPGA, 25-40 [Zbl 0998.68649] \textit{Orlando, Gerardo; Paar, Christof}, A high-performance reconfigurable elliptic curve processor for \(\text{GF}(S^m)\), 41-56 [Zbl 0998.68650] \textit{Chung, Jae Wook; Sim, Sang Gyoo; Lee, Pil Joong}, Fast implementation of elliptic curve defined over \(\text{GF}(p^m)\) on \(\text{CalmRISC}\) with \(\text{MAC}2424\) coprocessor, 57-70 [Zbl 0998.68654] \textit{Shamir, Adi}, Protecting smart cards from passive power analysis with detached power supplies, 71-77 [Zbl 0998.68656] \textit{Mayer-Sommer, Rita}, Smartly analyzing the simplicity and the power of simple power analysis on smartcards, 78-92 [Zbl 0998.68658] \textit{Hasan, M. Anwar}, Power analysis attacks and algorithmic approaches to their countermeasures for Koblitz curve cryptosystems, 93-108 [Zbl 0998.94535] \textit{Schindler, Werner}, A timing attack against RSA with the Chinese Remainder Theorem, 109-124 [Zbl 0998.94536] \textit{Dandalis, Andreas; Prasanna, Viktor K.; Rolim, Jose D. P.}, A comparative study of performance of AES final candidates using FPGAs, 125-140 [Zbl 0998.68663] \textit{Patterson, Cameron}, A dynamic FPGA implementation of the Serpent block cipher, 141-155 [Zbl 0998.68665] \textit{Trimberger, Steve; Pang, Raymond; Singh, Amit}, A 12 Gbps DES encryptor/decryptor core in an FPGA, 156-163 [Zbl 0998.68666] \textit{Leitold, Herbert; Mayerwieser, Wolfgang; Payer, Udo; Posch, Karl Christian; Posch, Reinhard; Wolkerstorfer, Johannes}, A 155 Mbps triple-DES network encryptor, 164…
Mathematics Subject Classification ID: 00B25
Mathematics Subject Classification ID: 94-06
Mathematics Subject Classification ID: 68-06
zbMATH DE Number: 1550316
zbMATH Keywords: Worcester, MA (USA)
zbMATH Keywords: Proceedings
zbMATH Keywords: Workshop
zbMATH Keywords: CHES 2000
zbMATH Keywords: Cryptographic hardware
zbMATH Keywords: Embedded systems
MaRDI profile type: Publication
full work available at URL: https://doi.org/10.1007/3-540-44499-8
OpenAlex ID: W2498088693
description: scientific article; zbMATH DE number 1550316