VLSI generalised digit serial architecture for multiplication, division and square root
type: Item
instance of: scholarly article
title: VLSI generalised digit serial architecture for multiplication, division and square root
zbMATH Open document ID: 1016.68500
DOI: 10.1016/S0165-1684(99)00100-0
author: A. E. Bashagha
published in: Signal Processing
publication date: 2002-09-05T00:00:00Z
Mathematics Subject Classification ID: 68M07
zbMATH DE Number: 1771858
zbMATH Keywords: digit serial combined arithmetic unit
MaRDI profile type: Publication
full work available at URL: s0165-1684(99)00100-0
OpenAlex ID: W1988445492
description: scientific article; zbMATH DE number 1771858