Formal verification of masked hardware implementations in the presence of glitches
type: Item
instance of: scholarly article
title: Formal verification of masked hardware implementations in the presence of glitches
zbMATH Open document ID: 1428.94062
DOI: 10.1007/978-3-319-78375-8_11
author: Roderick Bloem
author: Hannes Gross
author: Rinat Iusupov
author: Bettina Könighofer
author: Stefan Mangard
author: Johannes Winter
publication date: 2018-07-09T00:00:00Z
Mathematics Subject Classification ID: 94A60
Mathematics Subject Classification ID: 68P25
zbMATH DE Number: 6900707
zbMATH Keywords: masking
zbMATH Keywords: formal verification
zbMATH Keywords: threshold implementations
zbMATH Keywords: hardware security
zbMATH Keywords: side-channel analysis
zbMATH Keywords: private circuits
describes a project that uses: z3
describes a project that uses: EasyCrypt
describes a project that uses: REBECCA
describes a project that uses: Yosys
describes a project that uses: acrt
MaRDI profile type: Publication
full work available at URL: 978-3-319-78375-8 11
OpenAlex ID: W2795180100
description: scientific article; zbMATH DE number 6900707