A formal approach to designing delay-insensitive circuits
type: Item
instance of: scholarly article
title: A formal approach to designing delay-insensitive circuits
zbMATH Open document ID: 0731.68081
DOI: 10.1007/BF02252954
author: Jo C. Ebergen
published in: Distributed Computing
publication date: 1991-01-01T00:00:00Z
Mathematics Subject Classification ID: 68Q85
Mathematics Subject Classification ID: 94C99
zbMATH DE Number: 4209630
zbMATH Keywords: asynchronous circuit
zbMATH Keywords: trace semantics
zbMATH Keywords: regular expressions
zbMATH Keywords: delay- insensitive circuits
zbMATH Keywords: communication behavior
MaRDI profile type: Publication
cites work: Q4040828
cites work: Communicating sequential processes
cites work: Q3777424
cites work: Compiling communicating processes into delay-insensitive VLSI circuits
cites work: Trace theory and VLSI design
cites work: Q3337380
description: scientific article; zbMATH DE number 4209630