Efficient hardware implementation of finite fields with applications to cryptography
type: Item
instance of: scholarly article
title: Efficient hardware implementation of finite fields with applications to cryptography
zbMATH Open document ID: 1105.12003
author: Jorge Guajardo
author: Tim Güneysu
author: Sandeep S. Kumar
author: Christof Paar
author: Jan Pelzl
published in: Acta Applicandae Mathematicae
publication date: 2006-11-06T00:00:00Z
review text: This survey should be seen as complementary of another paper of four of the authors of this paper dedicated to the topic of Software Implementation of Finite Fields Arithmetic and published in the same issue of the same journal. In both cases the authors follow the same scheme: they consider the three types of fields, binary fields, prime fields and extensions fields, and in each one of the cases they survey the existing algorithms for finite field Addition, Multiplication and Inversion, always thinking in architectures ``specially suitable for cryptographic applications''. The Introduction (Section 1) analyzes the influence of the development of Public Key Cryptography in the work on architectures for finite fields arithmetic and how performance gains in the computation of such arithmetic operations (in particular the modular exponentiation) ``directly affect the performance of the entire cryptosystem''. The paper is interested in the area and time complexity of the different architectures and points out that the choice of one or another of them will depend on the computational constraints of the platform to be used (specially in the case of devices with small memory and computation capability such as smart cards and RIFD tags). Section 2 studies the case of prime fields \(\mathbb{F}_p\),\, describing the different Adders (ripple-carry adders, carry-lookahead adders, carry-save adders and carry-delayed adders), Multipliers (parallel and sequential algorithms, interleaved modular multiplication, Montgomery and Barret modular multiplication), etc. Section 3 discusses the several types of basis of an extension of fields: polynomial, normal and dual basis, although in the rest of the paper the elements will be represented in a polynomial base \(\{1, \alpha,\dots, \alpha^{m-1}\}\). The hardware implementation techniques for binary field extension are reviewed in Section 4 (bit multipliers, digit multipliers and single-accumulator multipliers), while Section 5 studies th…
Mathematics Subject Classification ID: 12Y05
Mathematics Subject Classification ID: 12-02
Mathematics Subject Classification ID: 12E30
Mathematics Subject Classification ID: 12E10
Mathematics Subject Classification ID: 11Y99
Mathematics Subject Classification ID: 94A60
zbMATH DE Number: 5070970
zbMATH Keywords: field arithmetic
zbMATH Keywords: cryptography
zbMATH Keywords: adders
zbMATH Keywords: multiplication circuits
zbMATH Keywords: binary field arithmetic
zbMATH Keywords: prime field arithmetic
zbMATH Keywords: extension field arithmetic
reviewed by: Juan Tena Ayuso
describes a project that uses: Xilinx
MaRDI profile type: Publication
full work available at URL: s10440-006-9072-z
OpenAlex ID: W4238750631
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DOI: 10.1007/S10440-006-9072-Z
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