Designing reliable and efficient networks on chips
type: Item
instance of: scholarly article
title: Designing reliable and efficient networks on chips
zbMATH Open document ID: 1184.68147
DOI: 10.1007/978-1-4020-9757-7
author: Srinivasan Murali
published in: Lecture Notes in Electrical Engineering
publication date: 2008-12-03T00:00:00Z
Mathematics Subject Classification ID: 68M99
Mathematics Subject Classification ID: 68-02
zbMATH DE Number: 5377273
zbMATH Keywords: NoC design
describes a project that uses: Chaco
MaRDI profile type: Publication
full work available at URL: https://doi.org/10.1007/978-1-4020-9757-7
OpenAlex ID: W1546837845
description: scientific article; zbMATH DE number 5377273