| Display title | Modelling and verification of delay-insensitive circuits using CCS and the concurrency workbench |
| Default sort key | 1029101 |
| Page length (in bytes) | 15 |
| Namespace ID | 4206 |
| Namespace | Publication |
| Page ID | 9002792 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
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| Counted as a content page | Yes |
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| MaRDI portal item ID | Q1029101 |
| Central description | scientific article; zbMATH DE number 5576956 |
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| Page creator | Import240129110113 (talk | contribs) |
| Date of page creation | 22:19, 30 January 2024 |
| Latest editor | Import240129110113 (talk | contribs) |
| Date of latest edit | 22:19, 30 January 2024 |
| Total number of edits | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
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