Pages that link to "Item:Q1603668"
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The following pages link to VLSI architectures of the 1-D and 2-D discrete wavelet transforms for JPEG 2000 (Q1603668):
Displaying 12 items.
- Design of a flexible 2-D discrete wavelet transform IP core for JPEG2000 image coding in embedded imaging systems (Q1031118) (← links)
- An integrated systolic array design for video compression (Q1405480) (← links)
- Novel JPEG 2000 compliant DWT and IWT VLSI implementations (Q1405537) (← links)
- A configurable architecture for the wavelet packet transform (Q1851104) (← links)
- Simplified biorthogonal discrete wavelet transform for VLSI architecture design (Q1934498) (← links)
- High-speed and low-power IP for embedded block coding with optimized truncation (EBCOT) sub-block in JPEG2000 system implementation (Q2432120) (← links)
- A survey on lifting-based discrete wavelet transform architectures (Q2432154) (← links)
- Low-power, low-complexity bit-serial VLSI architecture for 1D discrete wavelet transform (Q2465512) (← links)
- VLSI architecture for forward discrete wavelet transform based on B-spline factorization (Q2508509) (← links)
- The advanced OCA for 2-D discrete periodized wavelet transformation (Q2732880) (← links)
- VLSI Implementation of Discrete Wavelet Transform for Lossless Compression of Medical Images (Q4800620) (← links)
- A programmable parallel VLSI architecture for 2-D discrete wavelet transform (Q5947742) (← links)
