The following pages link to S. Banerjee (Q202631):
Displaying 6 items.
- (Q235345) (redirect page) (← links)
- An array architecture for computing two-dimensional discrete Hartley transforms (Q804326) (← links)
- (Q5007628) (← links)
- An Efficient Constant Multiplier Architecture Based on Vertical-Horizontal Binary Common Sub-expression Elimination Algorithm for Reconfigurable FIR Filter Synthesis (Q5007770) (← links)
- A VLSI array architecture for Hough transform (Q5943312) (← links)
- A VLSI array architecture for realization of DFT, DHT, DCT and DST (Q5958184) (← links)
