The following pages link to Jürgen Teich (Q207994):
Displaying 30 items.
- A new time-independent reliability importance measure (Q323355) (← links)
- Partitioning processor arrays under resource constraints (Q1376400) (← links)
- Automatic synthesis of FPGA processor arrays from loop algorithms (Q1425013) (← links)
- Design and implementation of digital linear control systems on reconfigurable hardware (Q1886923) (← links)
- Multidimensional exploration of software implementations for DSP algorithms (Q1974492) (← links)
- Analysis of dataflow programs with interval-limited data-rates (Q2432195) (← links)
- (Q2753713) (← links)
- Extending partial suborders (Q2816022) (← links)
- Partitioning of processor arrays: a piecewise regular approach (Q3136229) (← links)
- Digitale Hardware/Software-Systeme (Q3431231) (← links)
- (Q3528915) (← links)
- (Q3528920) (← links)
- Semi-automatic generation of mixed hardware/software prototypes from Simulink models (Q3528923) (← links)
- Solving Multi-objective Pseudo-Boolean Problems (Q3612455) (← links)
- (Q4367304) (← links)
- (Q4424288) (← links)
- (Q4424293) (← links)
- (Q4471677) (← links)
- (Q4471688) (← links)
- (Q4471689) (← links)
- REGULAR STATE MACHINES (Q4526933) (← links)
- Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices (Q4564160) (← links)
- (Q4778564) (← links)
- (Q4778618) (← links)
- (Q5089114) (← links)
- Higher‐Dimensional Packing with Order Constraints (Q5426891) (← links)
- (Q5701622) (← links)
- Evolutionary Multi-Criterion Optimization (Q5709883) (← links)
- Digitale Hardware/Software-Systeme (Q5851416) (← links)
- Optimization of dynamic hardware reconfigurations (Q5945702) (← links)
