The following pages link to (Q4730787):
Displaying 13 items.
- A systematic approach for designing concurrent error-detecting systolic arrays using redundancy (Q686628) (← links)
- Polymorphic arrays: A novel VLSI layout for systolic computers (Q1088396) (← links)
- Testing and reconfiguration of VLSI linear arrays (Q1128669) (← links)
- A fault-tolerant hexagonal systolic array (Q1198057) (← links)
- Catastrophic faults in reconfigurable systolic linear arrays (Q1363642) (← links)
- Enumerating catastrophic fault patterns in VLSI arrays with both uni- and bidirectional links (Q2778433) (← links)
- (Q3601087) (← links)
- Formal Probabilistic Analysis of Stuck-at Faults in Reconfigurable Memory Arrays (Q3605473) (← links)
- On testing for catastrophic faults in reconfigurable arrays with arbitrary link redundancy (Q4332022) (← links)
- Modeling the reliability of a class of fault-tolerant VLSI/WSI systems based on multiple-level redundancy (Q4420052) (← links)
- (Q4727437) (← links)
- On fault-tolerant structure, distributed fault-diagnosis, reconfiguration, and recovery of the array processors (Q4732082) (← links)
- (Q4808637) (← links)
