Pages that link to "Item:Q4849385"

The following pages link to VLSI architectures for the discrete wavelet transform (Q4849385):

Displaying 24 items.

• Implementing single-scale wavelet transform processor with magnetostatic surface wave device (Q412986) (← links)
• A VLSI systolic architecture for solving DBT-transformed fuzzy clustering problems of arbitrary size (Q910178) (← links)
• Parallel implementation of wavelet-based image denoising on programmable PC-grade graphics hardware (Q985586) (← links)
• An integrated systolic array design for video compression (Q1405480) (← links)
• Design and implementation of high-performance RNS wavelet processors using custom IC technologies (Q1405513) (← links)
• Discrete wavelet transform: Architectures, design and performance issues (Q1405539) (← links)
• Design of silicon IP cores for biorthogonal wavelet transforms (Q1597548) (← links)
• VLSI architectures of the 1-D and 2-D discrete wavelet transforms for JPEG 2000 (Q1603668) (← links)
• A configurable architecture for the wavelet packet transform (Q1851104) (← links)
• An efficient VLSI architecture for the computation of 1-D discrete wavelet transform (Q1851175) (← links)
• High-performance 1-D and 2-D inverse DWT 5/3 filter architectures for efficient hardware implementation (Q2405843) (← links)
• A novel FPGA architecture of a 2-D wavelet transform (Q2432148) (← links)
• A survey on lifting-based discrete wavelet transform architectures (Q2432154) (← links)
• Low-power, low-complexity bit-serial VLSI architecture for 1D discrete wavelet transform (Q2465512) (← links)
• VLSI architecture for forward discrete wavelet transform based on B-spline factorization (Q2508509) (← links)
• The advanced OCA for 2-D discrete periodized wavelet transformation (Q2732880) (← links)
• Creation of codes based on wavelet transformation and its application in ADV612 chips (Q2980110) (← links)
• Low complexity reconfigurable architecture for the 5/3 and 9/7 discrete wavelet transform (Q3642725) (← links)
• (Q4796847) (← links)
• Design of New Optimized Architecture Processor for DWT (Q4798219) (← links)
• VLSI Implementation of Discrete Wavelet Transform for Lossless Compression of Medical Images (Q4800620) (← links)
• A programmable parallel VLSI architecture for 2-D discrete wavelet transform (Q5947742) (← links)
• Distributed memory parallel architecture based on modular linear arrays for 2-D separable transforms computation (Q5947744) (← links)
• A VLSI array architecture for realization of DFT, DHT, DCT and DST (Q5958184) (← links)