Performance analysis of clock-regulated queues with output multiplexing in three different 2x2 crossbar switch architectures (Q1200161)
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scientific article; zbMATH DE number 96812
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Performance analysis of clock-regulated queues with output multiplexing in three different 2x2 crossbar switch architectures |
scientific article; zbMATH DE number 96812 |
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Performance analysis of clock-regulated queues with output multiplexing in three different 2x2 crossbar switch architectures (English)
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17 January 1993
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switches
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interconnection networks
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parallel shared memory computer
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0.85041475
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0.84363353
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0.8363284
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0.8363284
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0.83529496
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0.83529496
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