An application of the \((p,q)\)-logic to the synthesis of the \(p\)-valued logical networks and the \(s\)-\((p,q)\)-logical completeness (Q1818784)
From MaRDI portal
| This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: An application of the \((p,q)\)-logic to the synthesis of the \(p\)-valued logical networks and the \(s\)-\((p,q)\)-logical completeness |
scientific article; zbMATH DE number 1384409
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | An application of the \((p,q)\)-logic to the synthesis of the \(p\)-valued logical networks and the \(s\)-\((p,q)\)-logical completeness |
scientific article; zbMATH DE number 1384409 |
Statements
An application of the \((p,q)\)-logic to the synthesis of the \(p\)-valued logical networks and the \(s\)-\((p,q)\)-logical completeness (English)
0 references
7 June 2000
0 references
The author considers switching networks in a special \((p,q)\)-logic with \(p\)-valued output \((p\geq q)\), using threshold elements and connecting their realization with analog-like min-max circuits. In this way a notion of \(s\)-completeness is developed for some parameter \(s\) \((s\leq q-1)\) and some further conditions are discussed.
0 references
multy-valued circuit
0 references
completeness
0 references
switching networks
0 references
threshold elements
0 references
0 references
0.8679512
0 references
0.8246245
0 references