Packing circuits in eulerian digraphs (Q1924492)
From MaRDI portal
| This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: Packing circuits in eulerian digraphs |
scientific article; zbMATH DE number 936873
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Packing circuits in eulerian digraphs |
scientific article; zbMATH DE number 936873 |
Statements
Packing circuits in eulerian digraphs (English)
0 references
24 November 1996
0 references
A digraph is eulerian if for every vertex \(v\) its invalency equals its outvalency. Let \(G\) be a eulerian digraph. If \(H\) can be obtained from a subgraph of \(G\) by contracting edges then \(H\) is a minor of \(G\). Suppose \(c\) is the maximum number of pairwise edge-disjoint directed circuits of \(G\) and \(t\) the smallest size set of edges that meets all directed circuits of \(G\). The author shows that if \(G\) is a eulerian digraph such that the underlying undirected graph has no minor in the Peterson family then \(c=t\).
0 references
digraph
0 references
minor
0 references
directed circuits
0 references