Energy efficient memory architecture for high speed decoding of block turbo-codes with the Fang-Buda algorithm (Q2574076)
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scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Energy efficient memory architecture for high speed decoding of block turbo-codes with the Fang-Buda algorithm |
scientific article |
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Energy efficient memory architecture for high speed decoding of block turbo-codes with the Fang-Buda algorithm (English)
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16 November 2005
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VLSI architecture
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low power
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high throughput
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forward error correction (FEC) codes
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0.8951317
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0.84863734
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0.84489197
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0.84303176
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0.84044874
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0.83128023
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