A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time <formula formulatype="inline"><tex Notation="TeX">$\Sigma\Delta$</tex> </formula> ADC for a Digital Closed-Loop Class-D Amplifier (Q5007659)
From MaRDI portal
 | This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time <formula formulatype="inline"><tex Notation="TeX">$\Sigma\Delta$</tex> </formula> ADC for a Digital Closed-Loop Class-D Amplifier |
scientific article; zbMATH DE number 7385676
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time <formula formulatype="inline"><tex Notation="TeX">$\Sigma\Delta$</tex> </formula> ADC for a Digital Closed-Loop Class-D Amplifier |
scientific article; zbMATH DE number 7385676 |
Statements
A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time <formula formulatype="inline"><tex Notation="TeX">$\Sigma\Delta$</tex> </formula> ADC for a Digital Closed-Loop Class-D Amplifier (English)
0 references
26 August 2021
0 references
