Optimization of manufacturing of emitter-coupled logic to decrease surface of chip (Q5249436)
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scientific article; zbMATH DE number 6433247
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Optimization of manufacturing of emitter-coupled logic to decrease surface of chip |
scientific article; zbMATH DE number 6433247 |
Statements
Optimization of manufacturing of emitter-coupled logic to decrease surface of chip (English)
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6 May 2015
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emitter-coupled logic
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decreasing surface of chip
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optimization of technological process
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