Development of a multiple intermittent fault testing strategy (Q788700)

The paper examines testing of (apparently memoryless) circuits subject to multiple intermittent faults. An intermittent fault is a fault that is present in a circuit but which does not always affect the operation of the circuit. (Note the difference between an intermittent multiple fault and a multiple intermittent fault). It is assumed that simple and multiple fault tests are available. Then, different testing strategies are developed which depend on the rate of intermittent fault activities and the best value for the times between test applications are determined. In addition, the effects of masking intermittent faults in redundant circuits are explored. The results indicate that circuits with multiple intermittent faults can be tested effectively with single fault test sets. [Relevant reference: \textit{G. M. Masson} and \textit{S. Mallela}: Diagnosable systems for intermittent faults, IEEE Trans. Comput. C-27, 560-566 (1978; Zbl 0379.94037).]