A low complexity and low power SoC design architecture for adaptive MAI suppression in CDMA systems (Q851217)
From MaRDI portal
| This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: A low complexity and low power SoC design architecture for adaptive MAI suppression in CDMA systems |
scientific article; zbMATH DE number 5073823
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | A low complexity and low power SoC design architecture for adaptive MAI suppression in CDMA systems |
scientific article; zbMATH DE number 5073823 |
Statements
A low complexity and low power SoC design architecture for adaptive MAI suppression in CDMA systems (English)
0 references
17 November 2006
0 references
interference cancellation
0 references
low power
0 references
CDMA
0 references
adaptive
0 references
SoC
0 references
VLSI
0 references