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A rewriting-logic-with-SMT-based formal analysis and parameter synthesis framework for parametric time Petri nets - MaRDI portal

A rewriting-logic-with-SMT-based formal analysis and parameter synthesis framework for parametric time Petri nets (Q6622141)

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scientific article; zbMATH DE number 7929410
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English
A rewriting-logic-with-SMT-based formal analysis and parameter synthesis framework for parametric time Petri nets
scientific article; zbMATH DE number 7929410

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    A rewriting-logic-with-SMT-based formal analysis and parameter synthesis framework for parametric time Petri nets (English)
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    22 October 2024
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    parametric timed Petri nets
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    rewriting logic
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    Maude
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    SMT
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    parameter synthesis
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    symbolic reachability analysis
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